FPGA Acceleration of Authenticated Encryption with PUF-Key

The growing Internetof Things(loT) technology has made nearly all possible devices to interconnect seamlessly, such inter-network would raise the consideration for security in data that is shared. Low-power solutions are required for loT devices. This research addresses this security with a lightweight symmetric key cryptographic technique: ASCON, which ensures both the confidentiality and integrity of communicated data. Theproposed design leverages anovel technique by having a PhysicallyUnclonable Function(PUF)I to generate the key for encryption, enhancing the security of the ASCON cipher. A novel C-based design of Authenticated Encryption with PUF -Key is presented, specifically tailored for implementation on FPGA devices. The FPGA of choice, the xc7z010clg400-1 Zynq-7000, the IPUFIcircuit produces resource utilization of approximately 20% of ILookUp Tables(LUTs)1 and consumes a dynamic power of about 8mW. With FPGA hardware acceleration, the ASCON cipher achieves a good throughput of 22.85Mbps with approximately18% utilization ofresources on the chosen Field ProgrammableGate Array(F'PGA)I. The power consumption is achieved 30mW.