6T SRAM Cell Based Various Spillage Reduction Techniques for Low Power Applications

Static memory cells, sometimes called SRAMs, are used in various electrical systems. Compared to other memory cells, it consumes less energy, operates more quickly, and requires less frequent replacement. Thus, SRAM is the memory cell that VLSI designers use the most often. Mobile appliances employ octa-core processors, which have been available for 5 to 6 years in electronics. As a result, transistor density and capacity rise as size reduces. Also space-saving memory is being produced. Information can be kept in SRAM cells without being regularly restored as long as power is available. Due to its significant lead (DRAM), the purchase of SRAM was made feasible. In this research paper, different leakage reduction techniques were simulated to compare the static and dynamic power of SRAM cells. These techniques included DTMOS, LCNT, the tri-mode MTCMOS ground-gated approach, and the tri-mode MTCMOS power-gated approach. Various parameters, such as delay and static noise margin, have also been calculated. The Tri-Mode MTCMOS ground-gated method works 1.54, 1.92, 1.51, and 1.52 times faster than the 6T SRAM cell, DTMOS, LCNT, and Tri-Mode MTCMOS powergated methods. In terms of static power, it performs 2.12, 2.29, 1.68, and 1.073 better than the 6T SRAM cell, DTMOS, LCNT, and Tri-Mode MTCMOS power-gated method, respectively.