Transmission Line Based CDM ESD Current Target to Overcome Bandwidth Limitations

Reducing charged device model (CDM) electrostatic discharge (ESD) target levels for advanced integrated circuits (ICs) and systems on chip (SoCs) enables cost-effective manufacturing. Notably fast rise times, as low as 20 ps, have been observed for CDM events below 250 V. Previous investigations have highlighted fast rise times as critical parameters for damage in CDM testing of devices. These rapid rise times result in spectral frequency content exceeding 17.5 GHz, surpassing the bandwidth of existing CDM current targets employing disk resistors. To overcome this bandwidth limitation, a CDM current target comprised of parallel-connected transmission lines has been developed. Full-wave simulation results confirm the design of an initial prototype. Time-domain measurements conducted in an experimental setup exhibit exemplary results, with potential for further enhancement through de-embedding techniques.