Design of a General-Purpose, Compact, Operational Amplifier for Analog VLSI Cell Libraries

This paper presents an area-efficient rail-to-rail input and output operational amplifier (op-amp). The presented amplifier consumes $\mathbf{120}\ \boldsymbol{\mu} \mathbf{W}$ from a 1.2 V supply and implements gain boosting [1] to achieve high open-loop voltage gain (> 115 dB) despite being designed on a 55 nm BCD process. By leveraging Miller and damping-factor-control frequency compensation (DFCFC) [2] techniques, the presented amplifier is shown to be unity-gain stable and capable of driving capacitive loads up to 200 pF, making it suitable for use as an output line driver for monitoring internal nets of an IC. Furthermore, a constant-transconductance input stage is employed to obtain good linearity: 0.022 % THD.