Simulation and Comparison of Temperature-Dependent Capacitance of MOS Quantum Dot Devices with PbSe and PbTe on TiO2 Dielectric Layer

This study aims to simulate and analyze the capacitance-voltage characteristics of MOS devices based on lead selenide (PbSe) quantum dots and compare them with those based on lead telluride (PbTe) quantum dots. Two device configurations such as Al/PbSe/TiO2/Si and Al/PbTe/TiO2/Si, were investigated. The study comprised two groups, totaling 42 samples, with an $80 \%$ pretest power and a type 1 error rate of 0.05. Using the Multi-dielectric Energy Band Diagram Program (MEBDP) software, the capacitance-voltage characteristics of the devices were analyzed. Both PbSe and PbTe -based MOS devices exhibited stack capacitance with a significance value of $0.0001(\mathrm{p}\lt 0.05)$. The mean stack capacitance of the Al/PbTe/TiO2/Si-based MOS device was measured at $2.30 \mathrm{E}-7 \mathrm{~F}$, while that of the Al/PbSe/TiO2/Si-based MOS device was 1.90E-7 F. Conclusion: The stack capacitance of the MOS structure based on PbTe quantum dots significantly outperforms that based on PbSe quantum dots.