A 24.25-29.50 GHz 6-Bit Active Vector-Summing Phase Shifter with Low Gain Variation for 5G Communication

This paper presents a 6-bit active vector-summing phase shifter (VSPS) fabricated in 65nm 1P9M CMOS technology. To achieve low gain variation, low root-mean-square (RMS) phase and gain error, a degenerated-Q quadrature-all-pass filter (QAF) and a novel current-canceling phase inverting variable gain amplifier (PIVGA) with magnetically coupled resonators (MCR) for pole-tuning are used. Measurement results show that the proposed VSPS covers a 360° phase shifting range with a 5.625° step. The gain variation is no more than 3.18 dB throughout all the 64 phase states at 24.25-29.50 GHz. The RMS phase error is <1.1° after calibration, and the RMS gain error is <0.46 dB. The input-referred 1-dB compression point (IP1dB) is 5.4-6.8 dBm, and the power consumption is 33.4 mW. The proposed VSPS is suitable for 5G NR FR2 n257, n258, and n261 band communication.