Modeling of Power Distrubition Network (PDN) Noise Coupling Induced Clock Phase Noise

Phase noise analysis is important to clock design. Noise sources of spurs shown on the phase noise result are challenging to find out due to the unknown source locations and coupling mechanisms. Noise from power distribution network (PDN) is one of the most troublesome sources. A behavioral modeling methodology is proposed to simulate the clock phase noise induced by PDN noise coupling for two different mechanisms: PDN-to-clock additive coupling and PDN-to-PDN up-conversion modulation. The thermal noise and 1/f flicker noise are simplified to provide a straightforward view of spur level. The model can be applied to both single-ended clock and differential clock. The result of the model can be used to compare the power spectral density of the potential noise sources and provides hypothesis on the potential noise source together with layout change simulation. The potential root cause of the spurs is analyzed. The mitigation methodologies of the phase noise are proposed and evaluated in the specific case, presenting a 34 dB suppression to the spurs shown on a differential clock phase noise.