Novel Interdigital Capacitor-type Power Distribution Network Design for Power Noise Suppression in Redistribution Layer Interposer

The interposer-based high bandwidth memory-graphic processing unit (HBM-GPU) module plays the key role for high-performance computing (HPC) with ultra high data bandwidth. Among different interposer structures, redistribution layer (RDL) interposer has exhibited outstanding signal integrity performance due to its low dielectric constant (Dk) substrate. However, the low-loss characteristic results in compromised power integrity performance and increased coupling of power noise. Conventional methods that center on the placement of decoupling capacitors and filter-type structures cannot be effectively implemented on the RDL interposer due to its passive characteristic and limited routing space. In contrast to these methods, our focus is on designing the RDL interposer structure itself. In this paper, we proposed a novel power distribution work (PDN) design featuring an interdigital capacitor (IDC)-type structure and a hybrid-substrate layer stack, obtaining a larger on-interposer capacitor. We conducted simulations and analyses to investigate the impact of the proposed PDN structural parameters on the PDN impedance profile. Finally, we validated the effectiveness of the proposed IDC-type PDN in improving the PDN impedance and achieving superior noise attenuation by comparing it with the conventional mesh-type PDN.