A Double Loop Based Low Dropout Linear Regulator Design

This paper presents a double loop based LDO which has the ability to drive heavy load with large current and capacitance. A double-loop circuit has been implemented for the frequency compensation of the whole loop. Additionally, a carefully designed buffer circuit has been introduced to improve the loading capacity and to achieve high stability. The proposed LDO is implemented in a 0.35μm BCD process, achieving a phase margin of more than 35°to drive a large load capacitance range from 0 to 100μF and a large current load range from 1m to 3A under various PVT conditions.