The Design and Implementation of the Very Coarse Channelizer for the ALMA 2030 Wideband Sensitivity Upgrade

The Wideband Sensitivity Upgrade (WSU) for the Atacama Large Millimeter/Submillimeter Array (ALMA) radio telescope aims to widen the received IF bandwidth by at least a factor of two or desirably by a factor of four by 2030. In order to process the widened bandwidth, the Advanced Technology ALMA Correlator (ATAC), which is currently under development, is designed to ingest up to four real-valued sample streams per antenna, with each stream at the rate of 40 Gs/s. The ATAC Very Coarse Channelizer (VCC) firmware block to process two such sample streams yielding 81 time-interleaved “Frequency-Slices” (FSs) at the rate of 222.22… Ms/s each containing ∼202 MHz of science quality bandwidth. The channelization operation in the ATAC VCC firmware block is implemented in two stages. In the first stage, each of the input wideband signals is segmented into 101 2x frequency-slices (2xFSs) using an oversampled polyphase filter bank (OSPFB) that contains the same bandwidth as FSs but at the rate of 444.44… Ms/s. Next, 81 2xFSs out of the 101 that encompass the desired contiguous 16 GHz science bandwidth that can be selected using a configurable switch from each stream for subsequent processing with an array of half-band filters (HBFs). The outputs of HBFs are scaled such that optimum quantization efficiency is achieved when requantized to (8+8b). The VCC firmware block operates at the clock rate of 450 MHz. It requires 1534 DSP blocks and consumes ∼32% of logic resources available in the Intel Agilex 7 FPGA part AGME039R47A1E2VR0.