Inverse-Designed Photonic Computing Core for Parallel Matrix-Vector Multiplication

On-chip optical neural networks (ONNs) have recently emerged as an attractive hardware accelerator for deep learning applications, characterized by high computing density, low latency, and compact size. As these networks rely heavily on massive matrix multiplication, photonic matrix computing cores become crucial components for on-chip ONNs, which harness the degree of freedoms (DOFs) in photonics including space, wavelength and mode dimensions. However, previous photonic computing devices have not fully utilized the orthogonality and the conversion characteristic of the waveguide modes, which as we show here, allows for the simultaneous parallel computing of several independent matrix-vector multiplications within the same device. In this work, we propose an inverse-designed photonic computing core for parallel matrix-vector multiplication. The matrices are implemented through a mode conversion process, where the input fundamental modes are simultaneously converted into several orthogonal output modes. Specifically, we target the complex-valued conversion matrices between input and output modes and inversely design the dielectric constant distribution within the device to achieve parallel matrix-vector multiplication. As a demonstration, the proposed photonic computing core supports simultaneous parallel computing of two independent 2 × 2 matrix-vector multiplications, with an ultra-compact footprint (4.8 × 2.88 μm²) and high computing precision (relative error ≤ 8.1%) at 1550 nm. Additionally, photonic computing cores that support parallel computing of three independent 4 × 4 matrix-vector multiplications and two independent 8 × 8 matrix-vector multiplications are also designed. The inverse-designed photonic computing devices hold great potential for high-performance on-chip ONNs with low energy consumption and high computing density.