On Dead-Time Optimization and Active Gate Driving in Flyback Converters With Synchronous Rectifiers

Flyback converters with synchronous rectifiers are an important topic in power electronics, given their widespread use in various applications and the focus on efficiency improvement. However, flyback converters suffer from a high overvoltage across the synchronous rectifier on their secondary side. This overshoot voltage is a result of resonance between the flyback transformer stray inductance and the output capacitance of the rectifier. This paper presents an in-depth experimental study on the optimization of dead time and Active Gate Driving in flyback converters employing synchronous rectifiers, i.e. Silicon Carbide Power MOSFETs in place of the secondary rectifier driven synchronously with the primary switch. The focus is the influence of symmetrical dead time variation between the primary and secondary switches on switching losses and overshoot voltage. In addition, the influence of a three voltage level active gate driver on the overshoot voltage and switching losses is examined, finding no significant influence. The findings from this study contribute to the existing body of knowledge by providing a nuanced understanding of dead time optimization in flyback converters with synchronous rectifiers, as well as the utilization of Active Gate Drivers in such systems. The results have implications for the design and operation of these converters, potentially leading to more efficient and reliable systems.