Research on Secure Programming Startup Technology for Programmable Logic Devices Based on Flash Memory Dual Boot Bitstream

Programmable logic devices (FPGAs) and (CPLDs) often use Flash memory as internal or external configuration memory for storing startup bit streams. Flash memory has the characteristic of non-volatility and can usually maintain data without loss for a long time. However, under extreme conditions such as high temperature, unstable working voltage, or radiation interference, Flash memory data retention may sharply decrease, which can affect the lifespan of Flash memory products and cause abnormal operation of programmable logic devices. Based on the Flash memory dual boot bitstream scheme, two bitstreams are backed up to each other, and a self-test module circuit is used. After the programmable logic device is powered on and loaded to complete startup, the self-test module circuit performs periodic self-test of the stored bitstreams in Flash memory. The correct bitstreams that are backed up to each other are used to correct errors in the bitstreams, protect the security of Flash memory data, avoid errors in Flash memory data, and thereby affect the safe programming and normal startup work of the programmable logic device. The results of software simulation and board level testing verification show that the secure programming startup technology for programmable logic devices based on Flash memory dual boot bit streams can effectively and timely correct Flash memory error bit streams. At the same time, this technology can reduce the theoretical failure rate of Flash memory data from $0.7 \%$ (1-year failure rate and exponential increase over time) to $0.0049 \%$, and this failure rate does not accumulate over time. This technology can enhance the security and reliability of Flash memory data, ensuring the safe programming and normal startup of programmable logic devices, which proves the feasibility and effectiveness of the research results of this technology.