A 6.25-M-Pixel 270-fps Floating Gate Image Sensor Using High-Speed and Low-Power Readout Technology

This article presents a 6.25-M-pixel 270-frame per second (fps) floating gate image sensor (FGIS) with a pixel pitch of $1.4~\mu $ m. The readout speed mainly depends on the settling time under low pixel current conditions and the analog-to-digital conversion time. To this end, we introduce a bypass current to speed up the settling. In addition, by designing a comparison circuit based on a positive feedback unit (PFU), we successfully reduce the power consumption of the single-slope ADC (SS ADC) and optimized the conversion speed. The proposed techniques are experimentally verified in a $2500\times 2500$ pixel FGIS fabricated in the 65/55-nm backside-illuminated (BSI) stacked CMOS process. The experimental results demonstrate that the adoption of this readout architecture enables the FGIS to achieve a high frame rate of 270 fps and a low column power consumption of $43.87~\mu $ W, resulting in a 52% reduction in total power consumption compared with traditional designs. By introducing a bypass current, the maximum change in nonlinear percentage does not exceed 0.081%. By incorporating configurable timing, the dynamic range (DR) of the sensor reaches 75 dB. The random noise of this FGIS is measured to be $842~\mu {V}_{\text {rms}}$ (0.4 LSB), the FPN is 2.2%, with a figure of merit (FoM) of $54.7~\mu {V}_{\text {rms}} \cdot $ nJ.