ESD/Latch-up Immunities Enhancements of HV NLDMOSs by the Embedded Discrete SCR/Schottky Alternating Arrangement Design at the Drain Side

A modulation design incorporating the embedded discrete SCR/Schottky alternation at the nLDMOS drain side is fabricated via a 0.18μm high-voltage BCD process. This design aims to enhance the holding voltage, mitigate the risk of latch-up effects, and maintain excellent ESD discharge current capability. Consequently, they can improve ESD immunity and latch-up robustness. After TLP testing, the holding voltage increased by 12.5%, and the secondary breakdown current increased by 65.9%, with the PIMP_dis12 having the best FOM value of 7.04E-03 (A×V/μm²).