Design and Analysis of Single Master Multiple Slave Serial Peripheral Interface (SPI) on FPGA

This paper presents the design and analysis of an FPGA-based Single Master Multiple Slave Serial Peripheral Interface (SPI) system. SPI is a peripheral interface used to facilitate communication between devices. It performs data transfer by designating master and slave devices. However, current peripheral interfacing protocols have certain limitations. Parallel communication requires extensive wiring and is susceptible to noise and crosstalk, while serial communication can sometimes consume more power, have slower transfer speeds, and exhibit lower throughput. The main objective of this study is to design an SPI module capable of operating in both single-slave and multiple-slave modes. Simulations were performed using Modelsim to verify the functionality. Subsequently, the designs were successfully implemented on an FPGA. In conclusion, the single master multiple slave SPI module was successfully designed and verified.