A Low-Power Analog Readout Circuit Assisted by The Pseudo Thyristor

Low-Gain Avalanche Detectors (LGADs) are integral to modern high-energy physics experiments, but as the number of detector elements or pixels increases, there is a growing need for power-efficient read-out circuits. Addressing this, a novel CMOS discriminator called the Pseudo Thyristor, consuming zero static current, was proposed. Leveraging this innovation, we introduce a low-power analog read-out circuit tailored for precision timing detector applications for particle physics and nuclear physics experiments. The circuit begins with a low-impedance, high-slew-rate transimpedance amplifier to capture the input signal, which is then converted to current and further amplified by a discrimination input stage before being injected into the Pseudo Thyristor. The timing information of the particle hit event is derived from its flipping time. Schematic simulation results validate the effective detection of hit events. In addition, 27% power consumption is saved compared to the traditional readout circuit. This work will be implemented in the layout and fabricated in TSMC65nm process, and measurement results will be presented in the future. This development provides a power-efficient solution for future high-energy physics read-out Application-Specific Integrated Circuits (ASICs).