Dual-threshold voltage techniques for low-power domino logic circuit

Given its compact footprint and superior speed in contrast to complementary CMOS architecture,domino logic design has gained prominence in high-performance processor design.It has become a commonly used approach in this field.However,The issue of energy usage is a significant challenge for domino logic circuits.With the reduction in feature size,the static power consumption,primarily driven by subthreshold leakage current,progressively becomes the main contributor to total power consumption.For instance,in technology scaled down to 90 nanometers or less,static power dissipation predominantly dictates the total energy consumption.To address this problem,the dual threshold voltage method(DTV)is commonly utilized to reduce leakage power.This paper presents an analysis of the domino logic circuit,examining its sources of power usage,and explores the application of DTV(Dynamic Voltage Transition)technology.This technology aims to decrease standby power usage while preserving superior performance in both static and dynamic logic modules."This paper also presents three methods for further improvement based on the DTV technology:sleep switch transistors,dual threshold voltage DOING (Clock and input-sensitive transistors in domino logic), The technique involving the utilization of two distinct threshold voltages in conjunction with voltage scaling,commonly referred to as DTVS.