Performance Analysis of Quaternary Inverter Implemented Using FinFET Models

Due to their improved energy economy and reduced circuit complexity, multivalue logics have shown to be beneficial in the field of digital system design. In the field of multivalue logic, quaternary logic is typically regarded as an inventive method. This article describes the design of a quaternary inverter using 18 nm FinFET technology. Further, the performance of quaternary inverter is examined by employing different FinFET models. Based on simulation outcomes, the LVT, SVT, and HVT FinFET models display power consumption values of 8.61, 4.80, and 4.98 µ W, transient delay values of 10.02, 10.08, and 10.29 ns, and power delay product values of 86.33,48.38, and 51.24 (X10
⁻¹⁵
J), respectively. The designed quaternary inverter architecture is beneficial in designing quaternary arithmetic circuits for applications that requires quaternary signals.