Hardware Architecture of the Universal High-Speed Interconnection Chiplet for Chiplet Integration

Chiplet technology is a new technical approach for the integrated circuit industry to break through development bottlenecks in the “post-Moore era”. Die-to-die interconnection technology is an important research focus of chiplet technology. In order to quickly realize heterogeneous integration of functional chiplets, this paper designs a hardware architecture of the universal high-speed interconnection chiplet. The chiplet can realize chiplet expansion and data transmission and supports the rapid establishment of integrated chip products. The simulation results show that the D2D interconnection interface and the network-on-chip designed in this paper can meet the needs of high-speed data transmission between chiplets and provide an effective solution for chiplet integration.