Towards Accelerating k-NN with MPI and Near-Memory Processing

Message Passing Interface (MPI) is a common parallel programming model in High-Performance Computing fields. Recently, it has been widely used in Artificial Intelligence (AI) applications. However, the performance of those applications is limited by the memory wall problem, which is the performance gap between the processor and memory. To address these problems, we propose a novel computing architecture for accelerating k-NN query, which is the key operation of AI applications. The proposed computing architecture involves two or more computing nodes within a rack using the memory of an NMP device as a communication buffer and the accelerator of the NMP device for MPI collective communication. The superiority of the proposed method is that it reduces data copying during local computation and eliminates the network cost of gathering local computation results for global computation. Furthermore, it can enhance performance by processing data in the device's memory through near-memory processing. However, since these NMP devices are still in development, with no commercially available products currently, we have undertaken the task of developing them ourselves. Despite these circumstances, to demonstrate the feasibility of our proposed approach, we have implemented it in a single-node environment without making any unreasonable assumptions and have compared it with conventional approaches. Although we are using a single-node environment, we have designed a more sophisticated architecture, analyzed the time complexity, and compared the estimated performance of both the conventional and proposed approaches. We can conclude that the proposed computing architecture is feasible, and we anticipate an even more performance enhancement in a multi-node environment.