Novel Dummy Cell Programming Scheme to Improve Retention Characteristics in 3-D NAND Flash Memory

A novel dummy cell program (DMP) scheme has been introduced to enhance the retention characteristics of 3-D nand memory. This scheme programs dummy cells prior to the programming of target cells, aiming to induce a floating channel and reduce the channel potential. By programming dummy cells before target cells, the electric field in the tunneling oxide and charge trap layer (CTL) is alleviated, effectively mitigating both vertical and lateral charge loss mechanisms. Experimental characterization of threshold voltage ( ${V} _{T}\text {)}$ variations has been conducted based on program-verify (PV) levels and cell patterns. In the case of the erase-program–erase (EPE) pattern with PV7 dummy and PV3 target cells, a significant reduction of 31% in measured $\Delta {V} _{T}$ has been achieved. Notably, similar improvements are observed in the program-program–program (PPP) pattern. These findings strongly support the potential of the proposed DMP scheme in enhancing the reliability of flash memory.