Design Method of Impedance Matching Network for High Power Cascaded Class-E Inverter

Class-E inverters are widely used in high-frequency power conversion applications, and impedance matching networks are commonly used to match various loads to the given drain-source impedance required for class E inverter. However, due to the influence of the stray parameters in high-frequency circuit, fast and accurate design of the impedance matching network is still challenging. In this article, a design method of impedance matching network for cascaded class E inverters is proposed. The impedance matching network design method presented in this article prioritizes the design of the filter network to meet the waveform quality requirements, then adjusts the real part of the impedance using shunt capacitors, and finally adjusts the imaginary part of the impedance using an LC series circuit. In the driver circuit, the gate-source impedance including parasitic parameters of the main circuit switch is extracted to accomplish impedance matching. The correctness and effectiveness of the proposed scheme is verified by a 13.56 MHz, 5 kW experimental prototype, and experimental waveforms show good impedance matching and high output waveform quality.