Implementation of Level Shifters Using Logic Error Detection

A revolutionary logic error detection-equipped level shifter (LS-LED) is designed and implemented in this study with the goal of effectively changing near-threshold signals to super-threshold levels. In our suggested LS-LED design, current contention problems that plague conventional cross-coupled pFET-based level shifters (CPLS) are successfully resolved by employing a current mirror. We further address static current issues present in traditional current mirror LS designs by adding a feedback pFET that is managed by the output node. Our LS-LED can reduce power consumption by up to ten times when compared to conventional mirror-based LS (CMLS) designs, according to comparative analysis. In this regard, power efficiency advances significantly. The suggested LS-LED is effective, as demonstrated by the measurement results from circuit simulations carried out in Cadence 90 nm technology, which show notable decreases in power consumption and delay. As a whole, this study advances the effectiveness and efficiency of level shifting methods in integrated circuit architecture.