Packaging of Photonic Neural Network Accelerators

The proliferation of machine learning and neural networks in recent years has been spurred on by the development of deep learning models and their usefulness in a wide variety of applications. However new deep learning models have scaled to include billions of parameters which makes high speed computations incredibly power hungry. Photonic accelerators for machine learning have shown promise in keeping power usage under control while still providing high throughput computations. To be useful hardware for acceleration though photonic integrated circuits must be able to seamlessly integrate with modern compute architectures, to that end we present here our methodology for scaling laboratory based photonic accelerators down to a usable hardware. We present the work that has already taken place in scaling down to a PCB level instrument and the future steps that will be taken to reach a fully integrated photonic accelerator in a “black box” style. This work is an essential part of making novel computational hardware useful in combatting the ever-growing power usage in modern deep learning models.