A Gate Degradation Independent Online Junction Temperature Estimation Method for SiC MOSFETs Based on Residual Resistance

Estimating the junction temperature of silicon carbide (SiC)
mosfet
s plays a crucial role in enhancing their reliability in practical applications. Thermo-sensitive electrical parameters (TSEP) are commonly employed. However, the accuracy of junction temperature estimation using these TSEPs is usually reduced by gate degradation, as their correlation with temperature varies with the extent of gate degradation. To solve this problem, this article proposes an online junction temperature estimation approach that is independent of gate degradation. This method is based on residual resistance, which is the on-state resistance excluding channel resistance. First, the composition and temperature dependence of residual resistance are analyzed. The residual resistance exhibits a significant temperature dependence, which is extracted based on the SiC
mosfet
model and double-pulse test. The reason by which it is unaffected by gate degradation is also analyzed. Next, a method is proposed to effectively eliminate the impact of gate degradation on online residual resistance extraction. Third, the junction temperature estimating strategy based on residual resistance is proposed, and the corresponding gate drive circuit is developed. Finally, practical implementation and estimation errors are presented for both unaged and aged situations, using one planar and one trench SiC
mosfet
. Experimental results confirm the proposed approach's feasibility and accuracy.