Dynamic Control of Reconfigurable Intelligent Surfaces: An IC-Based MOS Varactor Approach

Reconfigurable intelligent surfaces (RISs) are recognized as a fundamental enabler for improving energy efficiency in 6G and future networks. However, the power consumption and the reconfiguration delay still need improvement for what is required at GHz frequencies, thus delaying their commercial adaptation. On that regard, this study proposes the incorporation of Integrated Circuits (ICs) with MOS varactor loadings as part of the RIS framework, to improve power consumption and speed, while having precise tuning of the reflection phase for individual unit-cells. The presented circuit design features an asynchronous digital circuit responsible for transmitting binary streams to digital-to-analogue converters, which in turn, bias MOS varactors that are directly connected to each unit-cell within the RIS. The use of asynchronous digital control circuits facilitates the development of ultra-low power, high-speed ICs, thereby enhancing the dynamic scalability of the RIS system. Simulated results of the asynchronous circuit are presented on a mature, cost-effective, CMOS 0.18 μm process technology, showing static power consumption of 40,63 μW, dynamic energy consumption of 474.43 pJ and reconfiguration delay of 23.38 ns. The simulations are accompanied by a scalability analysis and a discussion of potential capabilities, offering valuable insights for the future of ICs on RIS systems. The proposed approach and circuit provide flexibility and performance to RIS systems not achievable with conventional control systems due to their benefits of using clockless networking communication.