An 82dB-SNDR Input-Driving-Relaxed Noise-Shaping SAR with Amplifier-Reused In-Loop Buffering and NTF Leakage Reshaping

The noise-shaping successive-approximation register (NS-SAR) ADC is increasingly deemed as a promising digitizer architecture for high-resolution sensing and low-power wireless links. Many prior arts strove to attain superior energy efficiency by exploiting open-loop amplifiers and error-feedback (EF) structures [1]–[2]; but they are sensitive to PVT variations. While calibration can be employed to stabilize the open-loop amplifier [2], it consumes considerable power and area overhead. Another design challenge is the input driving of NS-SAR. As NS-SARs tend to target high-resolution with a relatively low oversampling ratio (OSR), the hardened kT/C noise requirement brings more stress to the input driver under the classic front-end sampling approach. Existing remedies include the buffer-in-loop (BIL) architecture [3]–[4] and kT/C noise cancellation [4]. However, BIL requires high supply voltage and incurs extra noise for the NS filter, whereas kT/C noise cancellation requires extra timing overhead.