Interferer-Tolerant RX Front-End Architectures

The proliferation of multiple bands dedicated to mobile communications in the frequency range 1 (FR 1), below 7.1 GHz, has multiplied the sources of interference in wireless receivers. This together with the extensive use of carrier aggregation and the self-interference generated by the transmitter (TX) in frequency-division duplex (FDD) transceivers [1], makes the use of traditional bulky, fixed off-chip SAW filters more and more impractical. Tunable duplexers [2] [3], however, have poor transmitter-to- receiver (TX-RX) isolation [4]. Receiver circuits must be designed to be resilient to the largest possible out-of-band (OOB) interferer lying at offset frequencies (Δf) that are relatively close to the desired channel (down to only 3–4 times the channel bandwidth). This has spurred an extensive research in interference-cancellation architectures [4-9]. These architectures require at least a blocker tolerant (main) receiver and an auxiliary path (canceler) for TX noise leakage suppression. In Fig. 1 the main architecture described in this work is reported. It consists of a main receiver for signal reception, an auxiliary receiver, which captures the transmitted signal together with the associated noise and distortion, and an equalizer, that is used to eliminate transmitter noise and distortion leakage from the received signal. Implementing the equalizer in digital offers great flexibility, enabling wideband self-interference cancellation even in the presence of significant frequency selectivity of the leakage component due to the duplexer characteristic as well as multiple antenna reflections. Several issues, however, arise in the design of the two receive paths, that will be analyzed here, with specific reference to earlier research results reported in [10] and [11].