Efficient Radix-4 Approximated Modified Booth Multiplier for Signal Processing and Computer Vision: A Probabilistic Design Approach

Approximation in arithmetic computations is accepted widely in error-resilient image and signal processing applications, in which the computation time is more critical than accuracy. Multipliers are the most common blocks that fall in the critical path limiting the performance and throughput of the system. The introduction of approximation in the multiplier units is considered highly advantageous due to reduced hardware requirements, provided the results are acceptable. In this work, approximate compressors are particularly designed for Radix4 modified booth multiplier using the probabilistic approach to achieve power, area, and performance benefits. Five approximate multiplier design variants were constructed based on the employment of approximate compressors along the columns of the partial product matrix. The proposed designs were synthesized for ASIC implementation and characterized for hardware and error metrics. A maximum improvement of 19.16%, 41.46%, and 51.53% are observed among the approximate multiplier variants compared to the exact version in terms of area, power-delay product (PDP), and area-power-delay product (APDP), respectively. All the proposed multipliers were evaluated for the applications: $\mu-l a w$ algorithm which is a standard companding algorithm used in telecommunication systems, and image segmentation using k-means clustering which is an unsupervised learning algorithm popularly used in computer vision systems.