A high-speed GaAs 1K static random access memory

A high-performance 1024/spl times/1-bit static random access memory has been designed and fabricated using an epitaxial GaAs direct coupled logic process. Design rules include 4-/spl mu/m interconnect metallization lines and spaces with 2/spl times/4-/spl mu/m/SUP 2/ vias. MESFETS have 1-/spl mu/m gate length and a self-aligned source and drain. A minimum address access time of 1.7 ns has been observed.