Ceramic Column Grid Array (CCGA) Solder Voiding on Interstellar Mapping and Acceleration Probe (IMAP) Printed Circuit Board Assemblies (PCBAs)

This paper describes the root cause analysis process of identifying and classifying ceramic column grid array (CCGA) solder voids with computer tomography (CT) on several Interstellar Mapping and Acceleration Probe (IMAP) printed circuit board assemblies (PCBA) spanning multiple subsystem and instrument electronic boxes. Solder voiding was observed at the printed circuit board (PCB) to column solder joint fillet, within the column body, and at the package body to column solder joint fillet. The paper will also address risk-based nonconformance disposition assessments to determine path forward of each affected PCBA. Root cause analysis concluded that voiding in the PCB to column solder joint fillet was caused by solder paste with higher flux and smaller powder particle size that helped trap flux volatiles after Johns Hopkins University Applied Physical Laboratory (JHU/APL) changed the solder paste deposition technique from stencil printing to jet printing. For larger voids in the column, the study concluded that material composition of column alloy was not as predicted (predicted Pb80/SN20; measured Pb50/Sn50). Gas bubbles generated during CCGA installation reflow migrate up the column body while the Pb50/Sn50 columns are in a "slush" phase and become entrapped when the column cools down into the solidus phase. The study did not pursue root cause of voiding found at the package body to column solder joint fillet beyond vendor outreach.To support a risk-based decision on path forward (rework, scrap, or use-as-is) for affected PCBAs, the IMAP project funded a test on environmental effects (random vibration testing and thermal cycling) of a PCBA with worst case solder voiding. The test concluded that CCGAs with significant voiding passed electrical checkouts throughout environmental testing despite evidence of micro-cracking beginning to propagate from the most extreme voids. However, this test was scoped for a specific mission environment and did not test to failure. APL continues to study the jet printing solder paste deposition technique for CCGA application and discussion with industry subject matter experts to determine whether a more comprehensive study is needed to characterize reliability of CCGA solder voiding to establish an industry standard for voiding acceptability.