Device Design of Step Field Plate RF LDMOS Transistor for Improved Power Amplifier Applications

This work discusses the optimization of a Step Field Plate (SFP) RF LDMOS transistor to enhance Power Amplifier (PA) performance. The impact of structural parameters: length of overlap between gate and P-well mask ($\mathrm{L}_{\mathrm{w}}$), between gate and N-LDD mask $(\mathrm{L}_{\mathrm{x}})$ and length of gate $(\mathrm{L}_{\mathrm{G}})$ on transconductance, device capacitances and operating frequency of the transistor is analyzed. Next, they are fine tuned to maximize large signal performance- output power, gain, and efficiency- of a common source PA circuit.