A Low-Voltage Low-Power 20-Msps 3-Bit Rail-to-Rail Flash ADC

The increasing demand for low-power and low-voltage integrated circuits leads to developing and adopting rail-to-rail input signal capability. Analog-to-digital converters (ADCs) are key building blocks in applications ranging from low- frequency signal conditioning to quantization in traditional low-and zero-IF receivers. This work presents the design and post- layout simulation results of a low-voltage fully-differential 3-bit Flash ADC with rail-to-rail input capability. It is accomplished by using two different comparator architectures, with NMOS and PM OS fully -differential inputs. The circuit is designed in a typical I80-nm CMOS process and is clocked at 20 MHz when powered by a 0.5- V power supply. The total power consumption of the ADC is 60.25 μ Wand the occupied silicon area is 0.079 mm2.