MOSFET-C Filter Design using Genetic Algorithm with Restricted Mutation for Gate Multiplicity

In this work, we propose an optimization procedure that is applied to a MOSFET-C filter, using a Chebyshev Type I approximation. The filter is designed in a CMOS 180 nm technology. This procedure can be employed with any type of filter and for any fabrication process. We also introduce a novel mutation heuristic that is useful when optimizing circuits with MOSFETs gate widths and multiplicities as design variables. The results indicate that the methodology generates a filter that is comparable to the one designed with traditional methods. Simulations are run using LTSpice and a command-line call to a Python script. That script manages template schematic diagram creation, simulation runs, and simulation results.