A Novel Method for Mapping Parallel Vector-Scalar Multiplication on CGRA

In this study, a novel method for mapping parallel vector-scalar multiplication on a specific Coarse Gained Reconfigurable Arrays (CGRA) is proposed for a research of the scalable Chiplet-based design. The method has been implemented for an example with a 7x7 matrix non-pivot LU decomposition, which practically applied in signal processing in 5G wireless systems. The iteration cost has been improved comparing with the direct-mapping method.