Time Interval Error (TIE)-based SI Design and Characterization of DDR5 Data Strobe Signaling

This paper proposes a time interval error (TIE)-based data strobe (DQS) signal integrity (SI) characterization method to adequately characterize, quantify, and design DDR5 DQS SI at its idle to active transitioning state. Using the proposed method, we assessed a DDR5 server platform system whether its DQS SI stabilizes within the defined preamble length or if not, how long the preamble should be for data (DQ) to be sampled by stable DQS. Also, by demonstrating TIE and time domain SI results of different cases of the system, we have provided the understanding on the mechanism of reflection and inter-symbol-interference (ISI) affecting DQS SI.