Multicore soft error reliability assessment and evaluation of Compiler optimization flag Effects on ARMv7 and ARMv8

With the fast technological advancement in submicron devices, today’s communication systems are more demanding for use of ARM based devices in safety critical systems. Cosmic rays penetrate and can change the data values of register, memory cells causing soft errors. Multi core and Commercial off the shelf architectures are more susceptible to soft errors and changes the order of execution of statements in program. So, reliability is a major concern in such resource constrained environments. This paper inspects, the use of the compiler optimization flag improves the soft error tolerance of programs running on ARM Cortex-M4F and ARM Cortex-A72 processors using virtual platform. The experimental results from 1K fault injections depicts that -Os level improves the soft error resilience of the applications compared to the -O0 level. Also, compared to a single core, dual cores have higher operating system thread management routines, which results in more OMMs and fewer Vanishes.