CMOS Power Amplifier with Inter-Stage Matching Network Using Tournament-Shape Transformer

In this study, we propose a power amplifier(PA) structure using tournament-shape transformer as inter-stage matching network. The proposed inter-stage can reduce the effect of the parasitic components of the transistors while minimizing the effect of additional interconnect lines between a drive stage and a power stage. In addition, the tournament-shape transformer matching network optimizes the impedance transformation between the drive and power stages, thereby improving the driving capability of the drive stage. To verify the feasibility of the proposed structure, we designed the PA using 130-nm RF SOI CMOS process. All of the matching networks, including test pads, were fully integrated. The size of the designed PA was 2. 6mmx1.3 mm. The measured PldB, peak P.A.E., and gain were 26.34 dBm, 38.1%, and 27.4 dB with the supply voltage 2. 5V. The power satisfied the WLAN S02.11n 2.2GHz64QAM of an EVM was 15.25 dBm.