Advanced Level Shifted Carrier Based Bus Clamping PWM Technique for a 54-Pulse AC-DC Converter Fed MLI Based Induction Motor Drive

Nowadays, the use of advanced pulse width modulation (PWM) techniques is becoming a research hot topic for improving the performance of multilevel inverter (MLI) based induction motor drives (IMDs). However, existing triangular carrier-based sinusoidal PWM (SPWM), conventional space vector PWM (CSVPWM), and existing bus-clamping PWM (BCPWM) techniques suffer from power quality problems. For further improvement of the performance of existing PWM techniques, an advanced level shifted carrier-based bus-clamping PWM (ALSBCPWM) technique is proposed in this paper for a 54-pulse ac-dc converter fed 7-level cascaded H-bridge (CHB) inverter based IMD. The carrier signal of the ALSBCPWM is formed by center-aligned harmonic injected saturated level shifted sinusoidal carriers. On the contrary, 3rd harmonic injected 60° bus clamping modulating signals are used along with the new carrier signals to develop the ALSBCPWM technique. The total harmonic distortion (THD) of inverter output voltage or motor voltage, motor current, inverter switching and conductor power losses of the CHB-MLI are all reduced by the presented ALSBCPWM technique. Excellent thermal stability of the insulated gate bipolar transistors (IGBTs) of the CHB-MLI is also achieved with the proposed PWM technique. The performances of the IMD with the proposed ALSBCPWM technique are studied based on the considerations for industry applications, such as power quality, power losses, and thermal stability. The performance of the proposed ALSBCPWM technique is validated through simulations in MATLAB/Simulink environment and testing in a reduced scale laboratory test platform.