An Impedance-Boosted Transformer-First Discrete-Time Analog Front-End Achieving 0.34 NEF and 389-MΩ Input Impedance

This article presents a transformer-first analog front-end (AFE) for ultra-low-power sensor nodes. The proposed AFE employs a discrete-time transformer based on series–parallel converters as an input stage. The switched-capacitor (SC) transformer can provide a passive low-noise voltage gain, attenuating the input-referred noise (IRN) of the following continuous-time chain. However, it also degrades the AFE input impedance. As a remedy, this article presents an input-resistance-boosting (IRB) loop that successfully increases the input resistance, sensing the output of a following continuous-time stage. At the same time, we also introduce an input-capacitance-canceling (ICC) loop to improve the input impedance at high frequencies. The proposed AFE achieves 389-
$\mathbf {M\Omega }$
input impedance at 1 kHz, which represents a 39
$\times $
improvement compared to prior work. Moreover, it attains superior noise efficiency, with an IRN of
$\mathbf {1.36}~\mathbf {\mu V_{\text {rms}}}$
, while consuming 370 nW. This results in a noise efficiency factor (NEF) of 0.34 and a power efficiency factor (PEF) of 0.1, the lowest reported values to the best of the authors’ knowledge. The impedance-boosted chain consisting of the SC transformer, first continuous-time amplifier (CTA), and the IRB loop achieves an NEF of 0.27 and a PEF of 0.06.