High Threshold Voltage Stability Enhancement-Mode GaN p-FETs Fabricated With PEALD-AlN Gate Interfacial Layer

This letter presents a meticulously designed gate structure featuring a SiNx/AlN staggered gate stack on GaN
${p}$
-channel field-effect transistors (
${p}$
-FETs) to enhance the modulation capability of the gate. It is found that the insertion of a 4 nm plasma enhanced atomic layer deposition (PEALD) AlN between SiNx gate dielectric and recessed p-GaN/AlN/AlGaN/GaN heterostructure can introduce positive charges with a density of
$2.26\times 10^{{13}}$
cm
$^{-{2}}$
. The fabricated
${p}$
-FETs exhibit a high threshold voltage (
${V}_{\text {TH}}{)}$
of −2.9 V, a high ON/OFF current ratio of
${2}\times {10} ^{{7}}$
, a low
${R}_{\text {ON}}$
of
$790 \Omega \cdot $
mm and an impressive OFF-state breakdown voltage of −64.8 V. Furthermore, a minimal
$\Delta {V}_{\text {TH}}$
under wide-range voltage stress and temperature variations indicates the application potential of the structure in GaN integrated circuits.