FPGA Implementation of Power-Lite Volterra- Inspired Neural Network Equalizer in 100G PON

Electronic nonlinear equalization is a promising technology to compensate for signal impairments in passive optical networks (PONs). However, the high complexity of nonlinear equalizers limits the deployment in application-specific integrated circuits (ASICs). To overcome this problem, we have proposed a Volterra-inspired neural network (VINN) equalizer. It maintains low complexity while providing powerful nonlinear fitting ability. In this paper, weight pruning and quantization are applied for deep joint compression to further decrease the complexity of VINN. The simplified architecture is adapted to field-programmable gate array (FPGA) implementation and enables more than 90% resource conservation. With the aid of a FPGA, VINN is implemented in a single-wavelength 100-Gbps band-limited intensity modulation and direct detection (IMDD) PON system. The efficiency of the proposed real-time VINN equalizer is verified in the experiment. Finally, a 30.34-dB power budget is obtained with the 10-GHz-class transmitter under the bit error ratio (BER) threshold of
$1{e}^{ - 2}$
. Taking into account the diplexer loss, our system is capable to support a power budget over 29 dB in actual applications.