A GaAs 256 × 4 Static Self-Timed Random Access Memory

A new GaAs 256 × 4 static self-timed RAM (SSTRAM) with input and output registers and internal write-pulse generation has been designed, fabricated, and tested. Fully functional ECL compatible SSTRAMs have been routinely obtained with equal read and write cycle times of 2.0 ns to 2.3 ns and power levels of 2.5 W to 3.4 W. This provides for a major improvement in memory system performance compared to the present 10 - 12 ns memory system cycle time using 7 ns ECL RAMs. This performance is obtained using GigaBit Logic's proven depletion-mode MESFET technology and innovative circuit design.