A Radiation-Hard Low-Power GaAs Static RAM using E-JFET DCFL

A fully decoded GaAs 256 by' 1 static RAM has been designed and fabricated with all 256 cells functional. The design utilizes DCFL gates with enhancement mode JFETs and resistive loads. N type resistors are used in the peripheral gating circuitry and high value Ρ type resistors in the memory cells. The circuit contains 1794 FETs with 1 µm gate lengths. The best access time measures 6.5 nsec, with 10 nsec typical. Cycle time is typically 20 nsec. Operating power of the circuit is quite low at 30 mW, with a standby power of 1.5 mW.