FPGA Real-Time Synchronization Algorithm for Multiple Picoseconds-Precision Time-to-Digital Converters

In these days, applications like Time-of-Flight Positron Emission Tomography (TOF-PET), or time-resolved spectroscopy, demand multi-channel time measurement systems at high precision and resolution where the channel count number can scale up to hundreds. Field Programmable Gate Array (FPGA) tailored solutions are able to cope at least with the former two characteristics, along with the fast-prototyping, low time-to-market and low Non-Recurring Engineering (NRE) costs requirements of such research field applications. They are thus adequate to implement Time-to-Digital Converters (TDC), with the cost, however, of occupying a large amount of their resources, and making, therefore, those devices limited in terms of hosting a so large number of channels. The proposed solution for this issue is to rather have a network of multiple FPGAs, each hosting a TDC, that work jointly while preserving the TDC’s resolution and precision. Unavoidably, when many FPGAs are connected together in a network, a parametric dispersion of components will exist. The most critical one is the clock frequency (of each FPGA) that generates the time reference of the TDCs, making the timestamps coming from different FPGAs incompatible. In this sense, we propose an algorithm that makes those timestamps compatible, by propagating a common a low-frequency signal that is used as a reference in order to compensate the spread induced by clock frequency parametric dispersion. The proposed algorithm is evaluated in a network of two 28-nm 7-series Xilinx Artix-7 FPGAs (xc7a100tftg256-2) that host a 38.1 fs resolution and 12 ps r.m.s. precision TDC with a reference signal of hundreds of kHz. In this way, we achieved a single-shot precision lower than 46.5 ps r.m.s. between timestamps coming from different FPGAs with a clock parametric dispersion of ±50 ppm.