SpaceWire Based Reconfiguration and Redundancy Management of COTS Based Highly Integrated Onboard Computer

This paper proposes a dynamic reconfiguration and redundancy solution for a next generation of COTS based Highly Integrated Computer System (CHICS) based on Xilinx Multiple Processor System on Chip (MPSoC) acting as a processor and Polarfire Field Programmable Gate Array (FPGA) acting as a supervisor using purely Commercial-Off-The-Shelf (COTS) components. The proposed architecture uses warm redundancy with dual lanes, nominal and redundant, each lane comprising of a processor and a supervisor. They are interconnected via SpaceWire on a compact PCI back plane making a CHICS pair. In each lane, the supervisor is responsible for monitoring the system and performing reconfiguration in case of a failure. Additionally, we have the option of switching between the nominal and redundant lanes seamlessly in case of a critical fault. The proposed solution is robust, efficient, and cost-effective, making it suitable for use in space applications targeting missions for Low Earth Orbits (LEO). In this paper we present the algorithm for reconfiguration along with the redundancy switchover and discuss the metrics obtained during the reconfiguration process.