An Improved Frequency Compensation Scheme for a Low Quiescent Current Low Dropout Voltage Regulator with Wide Input Voltage and Load Current Range

Low dropout regulators (LDO) are the most commonly used power management integrated circuit in consumer and automotive electronic applications. In order to remove the right-half-plane zero introduced by miller compensation, current-buffer compensation has been proposed for achieving stability of the LDO. However, only relying on this single compensation method, it is difficult to achieve stability when the loop gain is very high or the load capacitance is very large. This paper proposes an improved compensation scheme. By incorporating pole-zero tracking compensation into the current-buffer compensation, the loop can remain stable under high loop gain or large load capacitance conditions. A dynamically-biased buffer circuit is also proposed to push away the low frequency pole located at the gate of the pass device over the full load current range. The LDO designed in this paper can accept an input voltage of 2.5V~45V, transmit a load current of up to 300mA, withstand an external load capacitance of 1uF~200uF, and consume only 2.7uA of no-load quiescent current in room temperature.