Enhancing Security in Resource-Constrained Cryptographic Devices: A Lightweight Countermeasure Approach

Foundations of cryptography revolve around employing mathematically robust crypto-algorithms to ensure the data security. Nonetheless, even though these algorithms possess mathematical security, their implementation remains susceptible to non-invasive attacks. In response, Threshold Implementation (TI) has surfaced as a robust safeguard against such vulnerabilities. However, the introduction of TI in cryptographic devices increases hardware complexity, making it unsuitable for devices with limited resources. Therefore, it is crucial to develop efficient and impactful countermeasure strategies specifically designed for these designs. In this paper, our proposal introduces an Arbiter Physical Unclonable Function (A-PUF) based True Random Number Generator (TRNG) to obfuscate the intermediate values within the register. Additionally, we employ a pre-charge countermeasure to obfuscate combinational switching activities and a neutralizing countermeasure to further conceal register switching activities. Using a rolled (iterative) structure of the Advanced Encryption Standard (AES), this countermeasure is implemented on a 65nm Field Programmable Gate Array (FPGA). To evaluate the effectiveness of this countermeasure, we conduct a comparative analysis in terms of security strength and area consumption, comparing it with conventional design approaches.