HLS-Based FPGA Implementation of Multi-Label Learning for Radar Signal Recognition

In modern Electronic Support (ES) systems, the Radar Signal Recognition (RSR) component necessitates real-time processing of overlapping signals. In comparison to CPUs and GPUs, Field-Programmable Gate Arrays (FPGAs) exhibit enhanced energy efficiency and low-latency streaming capabilities, rendering them better suited for energy-sensitive or real-time machine learning endeavors. This paper presents a proposed system that leverages multi-label deep learning technology to autonomously recognize overlapping signals. The system is deployed on the FPGA platform, and optimization of the multi-label learning inference network is achieved through High-Level Synthesis (HLS) and loop pipeline techniques. The implemented solution comprises an energy-efficient HLS-based FPGA convolutional multi-label accelerator specifically designed for RSR applications, utilizing the Virtex-7 platform. The system operates at a frequency of 150MHz, resulting in a 35.2% increase in throughput and a significant 90.3 % reduction in power consumption compared to GPU-based platform.